CS302 Current Spring 2011 Final Term VU Paper [July 2011] Virtual University of Pakistan

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CS302 Current Spring 2011 Final Term VU Paper [July 2011] Virtual University of Pakistan

Question No: 01
 The divide-by-60 counter in digital clock is implemented by using two cascading counters:
       ► Mod-6, Mod-10                   Mod-50, Mod-10
        Mod-10, Mod-50                 Mod-50, Mod-6 
2)      A Nibble consists of _____ bits
         2        4           8        16
3) The voltage gain of the Inverting Amplifier is given by the relation ________
        Vout / Vin = - Rf / Ri           Vout / Rf = - Vin / Ri
        Rf / Vin = - Ri / Vout          Rf / Vin =   Ri / Vout

Question No:
) Differentiate between state assignment and State reduction.

 Question No:    ( Marks: 2 )
Some of the counters (e.g. 74HC163) are called pre-set counters. why?

   Question No:  ( Marks: 2 )
 How many bytes will be there in 16 K x 8 memory?

Q no:
 Define SOP and POS in K-map?

Q no:
 What is OR gate and its uses?   Marks 5

Question:
What is Stack? What register should use top to bottom stack?

Question
 How we detect a monotonic in Digital-to-Analogue conversion?

Question
Which conversion is used in Decimal to binary system?

Start mn jo J-k flip flop h un mn se Mcqs aye thy, or sampling se related  kuch thy.
This is my today CS302 paper that I solved on 19 July.
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